1. Field of the Invention:
The present invention relates to a decoder for decoding image data compressed with a compression method such as MPEG-2 supporting interlaced scanning, and more particularly to a variable resolution decoder for decoding image data such that the image data has lowered resolution at the time of display.
2. Description of the Related Art
In reproducing image data compressed with a compression method such as MPEG-2 which is known as a standard for realizing functions of compression and decompression of moving images and voice in real time, the image data is displayed on a display with resolution different from the size of the image data in some cases.
An example of such cases is when an image from an HDTV (High Definition Television) is output on a typical TV monitor or when image data is displayed on a monitor of a personal computer (hereinafter referred to as “PC”). In such a case, it is common practice to completely decode image data and then reduce the image data at the time of display, in which case detailed portions of the image (high-frequency components) are lost through the reduction processing. For this reason, image data is decoded with its high-frequency components removed in advance and the image data is reduced at the time of decoding, thereby improving reproduction performance. When image data is decoded with software on a PC, reproduction of image data of resolution lowered during decoding can lighten load on its CPU required for decoding the image data even when the CPU has low performance.
A decoder which lowers resolution of image data during decoding to output the reduced image data has been proposed in a document “Scalable decoder with no low-frequency drift” (Iwahashi, Kambayashi, and Kiya: Technical Report of IEICE DSP94-108 1995-01). FIG. 1 shows the decoder. For decoding compressed image data, only low-frequency components of discrete cosine transformed (hereinafter abbreviated as “DCT”) blocks are used to perform inverse discrete cosine transform (hereinafter abbreviated as “IDCT”) on 4 by 4 pixel blocks for lowering resolution. Motion compensation is performed by reducing values of decoded motion vectors to half with quarter image accuracy.
In the method, however, field information of image data of alternate lines is lost by reduction processing in a vertical direction in interlaced scanning. Thus, a problem occurs that field prediction employed in MPEG-2 or the like is not accurately made.
To solve the problem, Japanese Patent Laid-open Publication No. 2000-059793 proposes a method in which IDCT is performed in different manners for a field DCT mode and a frame DCT mode. In the method, for the frame DCT mode in which a top field and a bottom field are subjected together to DCT, image data is separated into two fields by once performing IDCT, field DCT is applied to each field, and only low-frequency components thereof are used to perform IDCT, thereby achieving reduction processing with field information maintained. The method involves an increased amount of operations and thus is not suitable for a field requiring high processing performance such as decoding of image data with software on a PC. It can be said that the method is not appropriate at all for a case in which display resolution is lowered in order to improve reproduction performance.